This invention relates to the field of broadband communications. More specifically, it relates to the architecture of packet switches, such as Asynchronous Transfer Mode (ATM) switches.
Traditional packet switch architectures are costly to maintain and upgrade because they tend to couple components that implement unrelated functions. Coupling of components occurs when their designs are highly interdependent on each other, such that one component cannot be changed without also changing the other component.
One example of coupling is the incorporation of one or more embedded computing systems into the platform on which switching takes place. This feature is undesirable because it couples the computing system, which implements software control functions, with other components that implement unrelated functions such as routing and automatic parameter control. Tight coupling between the embedded computing system and the other components on the switch means that the computing system cannot be changed without also changing all the other components on the switch. Because the embedded computing systems require upgrades far more often than other components on the switch, this feature drives-up maintenance and upgrade costs, and is therefore undesirable. Known packet switch architectures address this problem by moving software control functions, and any embedded computing systems, off the switching platform to standard computing platforms such as workstations. In such architectures, the platform holding the rest of the switching platform is referred to as a switching unit (SU), while the platform holding the decoupled computing system is hereinafter referred to as a computing unit (CU). The CU is connected to the SU by a high-speed link, such as an Ethernet link or an ATM link. The use of a CU and SU connected only by a high-speed link enforces a strict interface between the two that allows for the CU to be upgraded and scaled independently of the components comprising the SU.
Another example of coupling takes place between components that implement line interface functions, which do not change often, and components that implement cell processing functions, which are in a relative state of continual flux. Known packet switch architectures address this problem by centralizing the components that implement cell processing functions, into packet processing modules. The packet processing modules are separated from the modules containing the line interface components, which are hereinafter referred to as line interface modules, using a well-defined and stable interface.
Yet another example of coupling is the use of function-specific communication channels for connecting components on the SU to each other. As with the other examples of coupling, this coupling prevents functionally unrelated components that are connected to each other from being upgraded independently of one another. Unlike the other examples of coupling however, correctional adjustments to the packet switch architecture have yet to be developed in response to this coupling problem.
More specifically, in current packet switch architectures, the components within the SU are interconnected to one another using a plurality of dedicated unique connections. That is, the number of buses, the width of the buses, the signals used to coordinate transfers, the timing of the buses and other fundamental characteristics vary from connection to connection. Such connections are undesirable because they couple components that are in a constant state of flux to more stable components. It is desirable to protect the investments made in the more stable components by decoupling them from the unstable components. It is preferable that the decoupling be achieved without significantly reducing switching performance.
Partitioning of a switch architecture involves mapping a plurality of functions that need to be performed on the switch, to a plurality of components that can perform those functions. In partitioning a switch architecture, it is often desirable that closely related functions be mapped on to the same component, since such functions tend to have similar context memory requirements. Such mappings optimize the utilization of many switch resources, including the memory.
It is thus desirable to develop a new packet switch architecture that decouples components on the switch so that they can be upgraded or otherwise modified independently of one another. It is also desirable to achieve this object without significantly affecting the performance of the switch.
The aforementioned objects can be achieved by a packet switch that comprises a switching unit (SU) for switching packets between network links and a computing unit (CU) connected to the SU through a network link for implementing software control functions over the SU, wherein the SU comprises a plurality of components that are interconnected by generic buses, and wherein the components communicate with one another using program data units (PDUs) that are formatted and transmitted according to a shared device protocol.
The communication between the components occurs by placing PDUs in bus frames that are passed from component to component. Information is exchanged between the components by adding information to or dropping information from the fields of the PDUs, or by concatenating new fields to the PDUs, as the frames pass from component to component.
By using a generic bus to implement PDU-based interconnections within the SU, all the components are forced to support a common interface. Changes to the implementations of any component""s interface can thus be accommodated by changing the PDU format as opposed to changing the interfaces of connected components. The PDU format, and the means by which components access the PDUs, are designed to facilitate the adjustments that must be made by components every time a connected component is replaced and the format must change. A change in one component thus does not necessitate changes in the components connected to it. This means that the components of the architecture are decoupled.
In yet another aspect of this invention, the advantages gained by using a generic bus are optimally leveraged by partitioning the switch architecture such that functions that tend to change at the same time are implemented by the same components, where possible. The architecture is also partitioned so that related functions are mapped on to the same components. More specifically, an architecture of a switch is described that comprises a CU and an SU, and wherein the SU comprises the following components: an input/output module (IOM) for terminating network links; at least one cell memory (CM) for storing packets received from the network links until they are scheduled for transmission from the switch; and at least one cell processing module (CPM) directly connected to the memory for controlling the packet traffic flowing through the switch.
A partitioning of the CPM is also described, wherein the CPM comprises the following components: a Translation, Usage Parameter Control, and Buffer Manager (TUB) component that is connected to a component external to the CPM, and which is used for performing ingress and egress address translations, for implementing policing functions, and for performing buffer management functions; an OAM Control Module (OCM) component that is connected to the TUB ASIC, and which is used for terminating and sourcing Operations, Administration and Maintenance (OAM) flows; an Available Bit Rate (ABR) processing subsystem (APS) component that is connected to the OCM component, and which is used for implementing rate based flow control; and a Queue Management and Scheduling Subsystem (QMS) component that is connected to the APS component, and which is used for maintaining packet queues and for scheduling packet transmissions from the switch.
Another aspect of this invention relates to a switching unit for switching packets between network links and comprises a plurality of functional components interconnected by generic buses that exchange information with each other, and more specifically, a method of replacing any one of the components, said one component hereinafter being referred to as the old component, with a new component that exchanges different information with other components, said method comprising the steps of: adding, removing or resizing the fields of the bus frame which the changed component must access in order to exchange information with other components; and programming the new component, and reprogramming the other components, to perform the adding, dropping and concatenating functions on different parts of the frames such that all components are still accessing appropriate information within the PDUs.